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CY2308SI-1H中文资料PDF规格书
CY2308SI-1H规格书详情
Functional Description
The CY2308 is a 3.3V Zero Delay Buffer designed to distribute high speed clocks in PC, workstation, datacom, telecom, and other high performance applications.
The part has an on-chip PLL that locks to an input clock presented on the REF pin. The PLL feedback is driven into the FBK pin and obtained from one of the outputs. The input-to-output skew is less than 350 ps and output-to-output skew is less than 200 ps.
Features
■ Zero input-output propagation delay, adjustable by capacitive load on FBK input
■ Multiple configurations, see “Available CY2308 Configurations” on page 3
■ Multiple low skew outputs
■ Two banks of four outputs, three-stateable by two select inputs
■ 10 MHz to 133 MHz operating range
■ 75 ps typical cycle-to-cycle jitter (15 pF, 66 MHz)
■ Space saving 16-pin 150 mil SOIC package or 16-pin TSSOP
■ 3.3V operation
■ Industrial Temperature available
产品属性
- 产品编号:
CY2308SI-1H
- 制造商:
Cypress Semiconductor Corp
- 类别:
集成电路(IC) > 时钟发生器,PLL,频率合成器
- 包装:
管件
- 类型:
扇出缓冲器(分配),零延迟缓冲
- PLL:
带旁路
- 输入:
LVCMOS,LVTTL
- 输出:
LVCMOS
- 比率 - 输入:
1:8
- 差分 - 输入:
无/无
- 频率 - 最大值:
133.3MHz
- 分频器/倍频器:
无/无
- 电压 - 供电:
3V ~ 3.6V
- 工作温度:
-40°C ~ 85°C
- 安装类型:
表面贴装型
- 封装/外壳:
16-SOIC(0.154",3.90mm 宽)
- 供应商器件封装:
16-SOIC
- 描述:
IC CLK ZDB 8OUT 133MHZ 16SOIC
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
CYPRESS |
2016+ |
SOP |
2500 |
只做原装,假一罚十,公司可开17%增值税发票! |
询价 | ||
CY |
21+ |
SOP16 |
8000 |
原装现货。假一赔十 |
询价 | ||
CYPRESS |
2138+ |
原厂标准封装 |
8960 |
代理CYPRESS全系列芯片,原装现货 |
询价 | ||
CYPRESS |
20+/21+ |
DIP |
5600 |
全新原装进口价格优惠 |
询价 | ||
CYPRESS/赛普拉斯 |
22+ |
SOP |
50000 |
只做原装正品,假一罚十,欢迎咨询 |
询价 | ||
CYPRESS(赛普拉斯) |
23+ |
SOIC16 |
1509 |
原装现货,免费供样,技术支持,原厂对接 |
询价 | ||
CYPRESS(赛普拉斯) |
23+ |
SOIC16 |
940 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
询价 | ||
CYPRESS |
23+ |
SOP |
18000 |
询价 | |||
CY |
22+ |
SOP16P |
6980 |
原装现货,可开13%税票 |
询价 | ||
CY |
21+ |
SOP |
160 |
原装现货假一赔十 |
询价 |