CY14B101Q2-LHXC中文资料赛普拉斯数据手册PDF规格书

Functional Overview

The Cypress CY14B101Q1/CY14B101Q2/CY14B101Q3 combines a 1-Mbit nvSRAM with a nonvolatile element in each memory cell with serial SPI interface. The memory is organized as 128 K words of 8 bits each. The embedded nonvolatile elements incorporate the QuantumTrap technology, creating the world’s most reliable nonvolatile memory.

特性 Features

■ 1-Mbit nonvolatile static random access memory (nvSRAM)

❐ Internally organized as 128 K × 8

❐ STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by user using HSB pin (Hardware STORE) or SPI instruction (Software STORE)

❐ RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL)

❐ Automatic STORE on power-down with a small capacitor (except for CY14B101Q1)

■ High reliability

❐ Infinite read, write, and RECALL cycles

❐ 1 million STORE cycles to QuantumTrap

❐ Data retention: 20 years

■ High speed serial peripheral interface (SPI)

❐ 40 MHz clock rate

❐ Supports SPI mode 0 (0,0) and mode 3 (1,1)

■ Write protection

❐ Hardware protection using Write Protect (WP) pin

❐ Software protection using Write Disable instruction

❐ Software block protection for 1/4,1/2, or entire array

■ Low power consumption

❐ Single 3 V +20, –10 operation

❐ Average active current of 10 mA at 40 MHz operation

■ Industry standard configurations

❐ Industrial temperature

❐ CY14B101Q1 has identical pin configuration to industry standard 8-pin NV memory

❐ 8-pin dual flat no-lead (DFN) package and 16-pin small outline integrated circuit (SOIC) package

❐ Restriction of hazardous substances (RoHS) compliant