2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER

DESCRIPTION: The CSPT857C is a PLL based clock driver that acts as a zero delay buffer to distribute one differential clock input pair(CLK, CLK ) to 10 differential output pairs (Y [0:9],Y [0:9]) and one differential pair of feedback clock output (FBOUT, FBOUT). External feedback pins (FBIN, F

文件：348.05 Kbytes 页数：16 Pages

RENESAS

瑞萨

2.5V - 2.6V PLL Differential 1:10 SDRAM Clock Driver

Renesas

瑞萨

2.5V - 2.6V PLL Differential 1:10 SDRAM Clock Driver

Renesas

瑞萨

Package：56-TFBGA；包装：卷带（TR） 类别：集成电路（IC） 应用特定时钟/定时 描述：IC CLK BUF DDR 220MHZ 1CIRC

Renesas Electronics America Inc

Package：40-VFQFN 裸露焊盘；包装：卷带（TR） 类别：集成电路（IC） 应用特定时钟/定时 描述：IC CLK BUF DDR 220MHZ 1CIRC

Renesas Electronics America Inc

Package：40-VFQFN 裸露焊盘；包装：卷带（TR） 类别：集成电路（IC） 应用特定时钟/定时 描述：IC CLK BUF DDR 220MHZ 1CIRC

Renesas Electronics America Inc