CSP2510D

3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER

FEATURES: •Phase-LockLoopClockDistributionforSynchronousDRAM Applications •Distributesoneclockinputtoonebankoftenoutputs •Outputenablebankcontrol •Externalfeedback(FBIN)pinisusedtosynchronizethe outputstotheclockinputsignal •NoexternalRCnetworkrequire

CSP2510D

3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER

CSP2510DPG8

Package：24-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLK DVR PLL ZDB 1:10 24TSSOP

Renesas Electronics America Inc

CSP2510DPGG

Package：24-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLK DVR PLL ZDB 1:10 24TSSOP

Renesas Electronics America Inc

CSP2510DPGG8

Package：24-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLK DVR PLL ZDB 1:10 24TSSOP

Renesas Electronics America Inc

CT2510

CT2512/CT2513/CT2510/CT2511DualRedundantRemoteTerminalFORMIL-STD-1553B

GeneralDescription TheCT2512contains2transceivers,2encoder/decoders,bitprocessorsandcompleteRemoteTerminal(RT)logic.ThedeviceisconstructedusingAeroflexadvancedVLSIcustomchipandhybridtechnology.ItfunctionsasacompletedualredundantMIL-STD-1553BRTUnitsupporting

CT2510-FP

CT2512/CT2513/CT2510/CT2511DualRedundantRemoteTerminalFORMIL-STD-1553B

GeneralDescription TheCT2512contains2transceivers,2encoder/decoders,bitprocessorsandcompleteRemoteTerminal(RT)logic.ThedeviceisconstructedusingAeroflexadvancedVLSIcustomchipandhybridtechnology.ItfunctionsasacompletedualredundantMIL-STD-1553BRTUnitsupporting

CTLV2510SF

PowerInductors-Shielded

CTLVH2510F

PowerInductors-Shielded

CXA2510AQ

DolbyBTypeNoiseReductionSystemwithPlaybackEqualizerAmplifier

Description TheCXA2510AQisanICdesignedforuseincarstereocassettedecks.FunctionsincludeDolbyBtypenoisereduction(NR)system,playbackequalizeramplifierandmusicsensorintoasinglechip. Features •Fewexternalparts •Smallpackage(40-pinQFP) •Samepinconfigurationa