CS4804中文资料AMCC数据手册PDF规格书

The S4804 is a highly-integrated VLSI device that provides full-duplex mapping of packets or ATM cells to SONET/SDH payloads. It provides support for both uni-directional and bi-directional rings.

特性 Features

• Provides a SONET/SDH STS-48/STM-16, 4 STS-12/STM- 4, or 16 STS-3/STM-1 line interfaces.

• STS-48/STM-16 data stream supports a single STS-48c/AU-4-16c, or any valid combination of STS-12c/AU-4-4c and/or STS-3c/AU-4 SONET/SDH payloads.

• Each STS-12/STM-4 data stream supports a single STS- 12c/AU-4-4c or 4 STS-3c/AU-4 SONET/SDH payloads.

• Each STS-3/STM-1 data stream supports a single STS-3c/AU-4 SONET/SDH payload.

• Supports mixed STS-3 / STS-12 line rates

• Provides full-duplex mapping of ATM cells or packets in each payload tributary.

• Supports termination of mixed ATM and POS tributaries.

• Terminates/generates SONET/SDH section, line, and path layers with transport/section E1, E2, F1, and DCC overhead interfaces in both transmit and receive directions.

• APS port to support protection-switching configurations between two RHINE devices.

• 16-bit, bus interface at 155 MHz for STS-48/STM-16 mode, or serial interfaces operating at 622/155 MHz for STS-12/3 (STM-4/1) modes on the line side.

• 32-bit, parallel interface (FlexBus-3TM) operating at 100 MHz on the system side.

• .25 micron, 2.5V core, and 3.3V tolerant I/O.

• Packaged in a 624 Pin CBGA.

Applications

• ATM switches

• Packet over SONET Routers and Switches

• SONET/SDH Add Drop Multiplexers, Terminal Multiplexers, and Digital Cross Connects

• Test equipment