CH7036中文资料LVDS Converter Products数据手册Chrontel规格书

描述 Description

The CH7036 is specifically designed for Consumer Electronics Devices and Personal Computers that require High Definition (HD) Content video playback on the external displays such as HDMI/DVI monitors.
The CH7036’s HDMI transmitter is designed to support 1080p HDTV. For desktop monitors that do not have the HDMI input, the CH7036 has the capability to disable HDMI mode and output DVI signal or analog RGB signal (VGA). To support multi-display, the CH7036 can output either HDM/DVI or Analog RGB signals together with LVDS signal pass-through.
The CH7036’s single channel LVDS receiver/transmitter complies with the SPWG specification, a popular LVDS standard used by panel manufacturers. Each input/output LVDS interface is equipped with 4/1 pairs of differential signal buses to support video data and clock. The builtin dithering mechanism can be applied to approximate true 24-bit color video data if system manufacturers use less expensive 18-bit panels. Conversely, if input data is only 18-bit color, the simulation to 24-bit color for highend TFT LCD is also supported.
The device’s LVDS receiver can accept maximum video clock frequency for up to 85MHz or 1366x768 resolution in 24-bit color per pixel. A powerful scaling engine working together with other video processing circuits, will convert the captured LVDS signal stored in the internal SDRAM into High Definition Content video data. The built-in mixer will combine this HD digital RGB signal with decoded audio stream into HDMI format data, which will be serialized for output display by the CH7036 TMDS encoder.
The CH7036 supports both SPDIF and 2-channel I2S digital audio input. Its high fidelity audio decoder engine has the capability of sampling audio frequency for up to 192kHz for 2 channels.
Utilizing its high speed internal frame buffer, the CH7036’s scaling engine can increase the flexibility of the screen display. The video enhancement includes resizing the HDMI/DVI and RGB output display resolution, performing Frame Rate Conversion a well as rotating display orientation. Other video fine tuning, such as brightness control or contrast adjustment can be used to improve the display on the analog RGB monitor.
When CH7036 is powered up, its MCU is able to automatically execute the device configuration software in the device’s internal memory. When the firmware in the memory is programmed to support EDID communication and HPD, the MCU will toggle DDC bus lines to retrieve the display timing from the HDMI/DVI monitor if HPD is asserted. Furthermore an interrupt signal can be generated by MCU to host while the CH7036’s HPD is high.
The CH7036 supports the optional HDCP feature for preventing illegally copy High Definition Contented media.

特性 Features

·Single channel 18-bit/24-bit LVDS receiver and transmitter support display resolution up to 1366x768
·HDMI Transmitter are compliant with HDMI 1.4 specification and DVI 1.0 specification
·HDMI Tx supports up to 1920x1080@60Hz
·Supports VGA display up to 1080p
·DDC master for reading EDID
·Supports Hot Plug Detection (HPD) for HDMI/DVI
·Optional HDCP specification version 1.4 function
·Three 10-bit high speed DACs
·DACs can be switched off through programming internal registers. A separated composite sync is supported
·Monitor connection detection capability. Connection status can be retrieved through device's internal registers
·Pixel-level color enhancement for brightness and contrast (analog RGB only)
·SPDIF audio interface supports up to 20-bit data stream 192kHz/2ch
·Supports I2S digital audio input up to 24-bit data stream (32kHz/2ch, 44.1kHz/2ch, 48kHz/2ch, 88.2kHz/2ch, 96kHz/2ch, 176.4kHz/2ch and 192kHz/2ch)
·On-chip frame buffer allows flexible input LVDS video timing.
·Capable of converting input video frame rate to satisfy external displays’ refresh rate requirements
·Advanced scaling engine to upsize/downsize display resolution for HDMI, DVI and analog RGB outputs
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