CDP6805E2CE中文资料Innovasic数据手册PDF规格书

描述 Description

The IA6805E2 (CMOS) Microprocessor Unit (MPU) is a low cost, low power MPU. It features a CPU, on-chip RAM, parallel I/O compatibility with pins programmable as input or output. The following paragraphs will further describe this system block diagram and design in more detail.

FEATURES

• Form, Fit, and Function Compatible with the Harrisã CDP6805E2CE and Motorolaã MC146805E2

• Internal 8-bit Timer with 7-Bit Programmable Prescaler

• On-chip Clock

• Memory Mapped I/O

• Versatile Interrupt Handling

• True Bit Manipulation

• Bit Test and Branch Instruction

• Vectored Interrupts

• Power-saving STOP and WAIT Modes

• Fully Static Operation

• 112 Bytes of RAM