CDP1883C中文资料INTERSIL数据手册PDF规格书

描述 Description

The CDP1883 is a CMOS 7-bit memory latch and decoder circuit intended for use in CDP1800-series microprocessor systems. It can serve as a direct interface between the multiplexed address bus of this system and up to four 8K x 8-bit memories to implement a 32K-byte memory system. With four 4K x 8-bit memories, a 16K-byte system can be decoded.

特性 Features

• Performs Memory Address Latch and Decoder Functions Multiplexed or Non-Multiplexed

• Interfaces Directly with the CDP1800-Series Microprocessors

• Allows Decoding for Systems Up to 32K Bytes