CMOS 6-Bit Latch and Decoder Memory Interfaces

Description The CDP1881C, CDP1882 and CDP1882C are CMOS 6-bit memory latch and decoder circuits intended for use in CDP1800 series microprocessor systems. They can interface directly with the multiplexed address bus of this system at maximum clock frequency, and up to four 4K x 8-bit memories to

文件：48.4 Kbytes 页数：8 Pages

Intersil

CMOS 6-Bit Latch and Decoder Memory Interfaces

Description The CDP1881C, CDP1882 and CDP1882C are CMOS 6-bit memory latch and decoder circuits intended for use in CDP1800 series microprocessor systems. They can interface directly with the multiplexed address bus of this system at maximum clock frequency, and up to four 4K x 8-bit memories to

文件：48.4 Kbytes 页数：8 Pages

Intersil

CMOS 6-Bit Latch and Decoder Memory Interfaces

Description The CDP1881C, CDP1882 and CDP1882C are CMOS 6-bit memory latch and decoder circuits intended for use in CDP1800 series microprocessor systems. They can interface directly with the multiplexed address bus of this system at maximum clock frequency, and up to four 4K x 8-bit memories to

文件：48.4 Kbytes 页数：8 Pages

Intersil

CMOS 6-Bit Latch and Decoder Memory Interfaces

Description The CDP1881C, CDP1882 and CDP1882C are CMOS 6-bit memory latch and decoder circuits intended for use in CDP1800 series microprocessor systems. They can interface directly with the multiplexed address bus of this system at maximum clock frequency, and up to four 4K x 8-bit memories to

文件：48.4 Kbytes 页数：8 Pages

Intersil

Dual Log Audio Digital Potentiometer

General Description The DS1882 is a dual, nonvolatile (NV) digital potentiometer designed to operate in audio systems that accomodate up to ±7V signal levels. The potentiometer settings can be stored in EEPROM so that they are retained when the power is cycled. The DS1882 has separate supplies fo

文件：237.58 Kbytes 页数：15 Pages

Maxim

美信

Sync Separator w/50 Slice, AGC

The EL1882C video sync separator is manufactured using Elantecs high performance analog CMOS process. This device extracts sync timing information from both standard and non-standard video input. It provides composite sync, vertical sync, burst/back porch timing and odd/even field detection. 50 sy

文件：167.17 Kbytes 页数：11 Pages

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