CDCS503PW集成电路（IC）的时钟缓冲器驱动器规格书PDF中文资料

CDCS503PW属于集成电路（IC）的时钟缓冲器驱动器。由美国德州仪器公司制造生产的CDCS503PW时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。

1FEATURES

· Part of a Family of Easy to use Clock

Generator Devices With Optional SSC

· Clock Multiplier With Selectable Output

Frequency and Selectable SSC

· SSC Controllable via 2 External Pins

– ±0%, ±0.5%, ±1%, ±2% Center Spread

· Frequency Multiplication Selectable Between

x1 or x4 With One External Control Pin

· Output Disable via Control Pin

· Single 3.3V Device Power Supply

· Wide Temperature Range –40°C to 85°C

· Low Space Consumption by 8 Pin TSSOP

Package

APPLICATIONS

· Consumer and Industrial Applications

requiring EMI reduction through Spread

Spectrum Clocking and/ or Clock

Multiplication

DESCRIPTION

The CDCS503 is a spread spectrum capable, LVCMOS Input Clock Buffer with selectable frequency

multiplication.

It shares major functionality with the CDCS502 but utilizes a LVCMOS input stage instead of the crystal input

stage of the CDCS502. Also an Output Enable pin has been added to the CDCS503.

The device accepts a 3.3V LVCMOS signal at the input.

The input signal is processed by a PLL, whose output frequency is either equal to the input frequency or

multiplied by the factor of 4.

The PLL is also able to spread the clock signal by ±0%, ±0.5%, ±1% or ±2% centered around the output clock

frequency with a triangular modulation.

By this, the device can generate output frequencies between 8MHz and 108MHz with or without SSC.

A separate control pin can be used to enable or disable the output. The CDCS503 operates in 3.3V environment.

It is characterized for operation from –40°C to 85°C, and available in an 8-pin TSSOP package.