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CDCLVP2102RGTT.B中文资料德州仪器数据手册PDF规格书

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厂商型号

CDCLVP2102RGTT.B

功能描述

CDCLVP2102 Four-LVPECL Output, High-Performance Clock Buffer

丝印标识

2102

封装外壳

VQFN

文件大小

810.13 Kbytes

页面数量

28

生产厂商

TI

中文名称

德州仪器

网址

网址

数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-11-10 18:00:00

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CDCLVP2102RGTT.B规格书详情

1 Features

1• Dual 1:2 Differential Buffer

• Two Clock Inputs

• Universal Inputs Can Accept LVPECL, LVDS,

LVCMOS/LVTTL

• Four LVPECL Outputs

• Maximum Clock Frequency: 2 GHz

• Maximum Core Current Consumption: 48 mA

• Very Low Additive Jitter: <100 fs, RMS in 10-kHz

to 20-MHz Offset Range

• 2.375-V to 3.6-V Device Power Supply

• Maximum Propagation Delay: 450 ps

• Maximum Within Bank Output Skew: 10 ps

• LVPECL Reference Voltage, VAC_REF, Available

for Capacitive-Coupled Inputs

• Industrial Temperature Range: –40°C to +85°C

• Supports 105°C PCB Temperature (Measured

with a Thermal Pad)

• Available in 3-mm × 3-mm, 16-Pin VQFN (RGT)

Package

• ESD Protection Exceeds 2000 V (HBM)

2 Applications

• Wireless Communications

• Telecommunications/Networking

• Medical Imaging

• Test and Measurement Equipment

3 Description

The CDCLVP2102 is a highly versatile, low additive

jitter buffer that can generate four copies of LVPECL clock outputs from two LVPECL, LVDS, or LVCMOS

inputs for a variety of communication applications. It

has a maximum clock frequency up to 2 GHz. Each

buffer block consists of one input that feeds two

LVPECL outputs. The overall additive jitter performance is less than 0.1 ps, RMS from 10 kHz to

20 MHz, and overall output skew is as low as 10 ps,

making the device a perfect choice for use in

demanding applications.

The CDCLVP2102 clock buffer distributes two clock

inputs (IN0, IN1) to four pairs of differential LVPECL

clock outputs (OUT0, OUT3) with minimum skew for clock distribution. Each buffer block consists of one

input that feeds two LVPECL clock outputs. The

inputs can be LVPECL, LVDS, or LVCMOS/LVTTL.

The CDCLVP2102 is specifically designed for driving

50-Ω transmission lines. When driving the inputs in

single-ended mode, the LVPECL bias voltage

(VAC_REF) should be applied to the unused negative

input pin. However, for high-speed performance up to 2 GHz, differential mode is strongly recommended.

The CDCLVP2102 is characterized for operation from

–40°C to +85°C and is available in a 3-mm × 3-mm, VQFN-16 package.

供应商 型号 品牌 批号 封装 库存 备注 价格
TI/德州仪器
25+
25000
原厂原包 深圳现货 主打品牌 假一赔百 可开票!
询价
22+
5000
询价
TI/德州仪器
24+
NA
38522
只做全新原装进口现货
询价
TI
20+
VQFN28
53650
TI原装主营-可开原型号增税票
询价
TI
22+
QFN
8000
原装正品支持实单
询价
TI/德州仪器
21+
VQFN28
36680
只做原装,质量保证
询价
TI
三年内
1983
只做原装正品
询价
TI/德州仪器
24+
VQFN28
3000
订货中主营TI
询价
TI
23+
N/A
560
原厂原装
询价
TI/德州仪器
22+
VQFN28
12245
现货,原厂原装假一罚十!
询价