CDCE706集成电路(IC)的时钟发生器PLL频率合成器规格书PDF中文资料

| 厂商型号 |
CDCE706 |
| 参数属性 | CDCE706 封装/外壳为20-TSSOP(0.173",4.40mm 宽);包装为卷带(TR);类别为集成电路(IC)的时钟发生器PLL频率合成器;产品描述:IC 3-PLL SYNTH/MULT/DIV 20-TSSOP |
| 功能描述 | PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER |
| 封装外壳 | 20-TSSOP(0.173",4.40mm 宽) |
| 文件大小 |
1.22229 Mbytes |
| 页面数量 |
46 页 |
| 生产厂商 | TI |
| 中文名称 | 德州仪器 |
| 网址 | |
| 数据手册 | |
| 更新时间 | 2026-1-26 8:58:00 |
| 人工找货 | CDCE706价格和库存,欢迎联系客服免费人工找货 |
CDCE706规格书详情
CDCE706属于集成电路(IC)的时钟发生器PLL频率合成器。由德州仪器制造生产的CDCE706时钟发生器,PLL,频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲,这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。
1FEATURES
· High-Performance 3:6 PLL-Based Clock
Synthesizer/Multiplier/Divider
· User-Programmable PLL Frequencies
· EEPROM Programming Without the Need to
Apply High Programming Voltage
· Easy In-Circuit Programming via SMBus Data
Interface
· Wide PLL Divider Ratio Allows 0-ppm Output
Clock Error
· Clock Inputs Accept a Crystal, a Single-Ended
LVCMOS, or a Differential Input Signal
· Accepts Crystal Frequencies From 8 MHz to
54 MHz
· Accepts LVCMOS or Differential Input
Frequencies up to 200 MHz
· Two Programmable Control Inputs [S0/S1,
A0/A1] for User-Defined Control Signals
· Six LVCMOS Outputs With Output Frequencies
up to 300 MHz
· LVCMOS Outputs Can Be Programmed for
Complementary Signals
· Free Selectable Output Frequency via
Programmable Output Switching Matrix [6×6]
Including 7-Bit Post-Divider for Each Output
· PLL Loop Filter Components Integrated
· Low Period Jitter (Typically 60 ps)
· Features Spread-Spectrum Clocking (SSC) for
Lowering System EMI
· Programmable Output Slew-Rate Control
(SRC) for Lowering System EMI
· 3.3-V Device Power Supply
· Industrial Temperature Range –40°C to 85°C
· Development and Programming Kit for Easy
PLL Design and Programming (TI ClockPro
Software)
· Packaged in 20-Pin TSSOP
DESCRIPTION
The CDCE706 is one of the smallest and most
powerful PLL synthesizer/multiplier/dividers available
today. Despite its small physical outline, the
CDCE706 is very flexible. It has the capability to
produce an almost independent output frequency
from a given input frequency.
The input frequency can be derived from an
LVCMOS, differential input clock, or single crystal.
The appropriate input waveform can be selected via
the SMBus data interface controller.
To achieve an independent output frequency, the
reference divider M and the feedback divider N for
each PLL can be set to values from 1 to 511 for the M-divider and from 1 to 4095 for the N-divider. The
PLL-VCO (voltage controlled oscillator) frequency
then is routed from the programmable output
switching matrix to any of the six outputs. The
switching matrix includes an additional 7-bit post-divider (1 to 127) and an inverting logic for each
output.
The deep M/N divider ratio allows the generation of
zero-ppm clocks from any reference input frequency
(e.g., 27 MHz).
The CDCE706 includes three PLLs; of those, one
supports spread-spectrum clocking (SSC). PLL1,
PLL2, and PLL3 are designed for frequencies up to
300 MHz and optimized for zero-ppm applications
with wide divider factors.
PLL2 also supports center- and down-spread-spectrum clocking (SSC). This is a common technique to reduce
electromagnetic interference. Also, the slew-rate controllable (SRC) output edges minimize EMI noise.
Based on the PLL frequency and the divider settings, the internal loop filter components are automatically
adjusted to achieve the high stability and optimized jitter transfer characteristic of the PLL.
The device supports nonvolatile EEPROM programming for easily customized application. The device is
preprogrammed with a factory default configuration (see Figure 13) and can be reprogrammed to a different
application configuration before it goes onto the PCB or reprogrammed by in-system programming. A different
device setting is programmed via the serial SMBus interface.
Two free programmable inputs, S0 and S1, can be used to control for each application the most demanding logic
control settings (outputs disable to low, outputs 3-state, power down, PLL bypass, etc).
The CDCE706 has three power-supply pins, VCC, VCCOUT1, and VCCOUT2. VCC is the power supply for the device.
It operates from a single 3.3-V supply voltage. VCCOUT1 and VCCOUT2 are the power supply pins for the outputs.
VCCOUT1 supplies the outputs Y0 and Y1, and VCCOUT2 supplies the outputs Y2, Y3, Y4, and Y5. Both output
supplies can be 2.3 V to 3.6 V. At output voltages lower than 3.3 V, the output drive current is limited.
The CDCE706 is characterized for operation from –40°C to 85°C.
产品属性
更多- 产品编号:
CDCE706PWG4
- 制造商:
Texas Instruments
- 类别:
集成电路(IC) > 时钟发生器,PLL,频率合成器
- 包装:
卷带(TR)
- 类型:
扩展频谱时钟驱动器
- PLL:
带旁路
- 输入:
LVCMOS,晶体
- 输出:
LVCMOS
- 比率 - 输入:
1:6
- 差分 - 输入:
是/无
- 频率 - 最大值:
300MHz
- 分频器/倍频器:
是/是
- 电压 - 供电:
3V ~ 3.6V
- 工作温度:
-40°C ~ 85°C
- 安装类型:
表面贴装型
- 封装/外壳:
20-TSSOP(0.173",4.40mm 宽)
- 供应商器件封装:
20-TSSOP
- 描述:
IC 3-PLL SYNTH/MULT/DIV 20-TSSOP
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI/BB |
24+ |
TSSOP-20 |
5650 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
询价 | ||
TI/德州仪器 |
24+ |
TSSOP-20 |
9600 |
原装现货,优势供应,支持实单! |
询价 | ||
TI/德州仪器 |
22+ |
UNKNOWN |
30000 |
十七年VIP会员,诚信经营,一手货源,原装正品可零售! |
询价 | ||
TI/德州仪器 |
24+ |
TSSOP-20 |
500 |
只供应原装正品 欢迎询价 |
询价 | ||
TI(德州仪器) |
2021+ |
TSSOP-20 |
499 |
询价 | |||
TI |
24+ |
12 |
原装现货,可开13%税票 |
询价 | |||
TI/德州仪器 |
24+ |
TSSOP-20 |
6000 |
全新原装深圳仓库现货有单必成 |
询价 | ||
TI/德州仪器 |
24+ |
TSSOP |
1313 |
大批量供应优势库存热卖 |
询价 | ||
TI |
2016+ |
TSSOP20 |
3000 |
主营TI,绝对原装,假一赔十,可开17%增值税发票! |
询价 | ||
TEXAS INSTRUMENTS |
2022+ |
原厂原包装 |
8600 |
全新原装 支持表配单 中国著名电子元器件独立分销 |
询价 |

