CDCDB2000集成电路（IC）的时钟缓冲器驱动器规格书PDF中文资料

CDCDB2000属于集成电路（IC）的时钟缓冲器驱动器。由德州仪器制造生产的CDCDB2000时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。

1 Features

• 20 LP-HCSL outputs with integrated 85-Ω output

terminations

• 8 hardware output enable (OE#) controls

• Additive phase jitter after DB2000QL filter:

< 0.08ps rms

• Supports PCIe Gen 4 and Gen 5 Common Clock

(CC) and Individual Reference (IR) architectures

– Spread spectrum-compatible

• Cycle-to-cycle jitter: < 50 ps

• Output-to-output skew: < 50 ps

• Input-to-output delay: < 3 ns

• 3.3-V core and IO supply voltages

• Hardware-controlled low power mode (PD#)

• Side-Band Interface (SBI) for output control in PD#

mode

• 9 selectable SMBus addresses

• Power consumption: < 600 mW

• 6-mm × 6-mm, 80-pin TLGA/GQFN package

2 Applications

• Microserver & tower server

• Storage area network & host bus adapter card

• Network attached storage

• Hardware accelerator

3 Description

The CDCDB2000 is a 20-output LP-HCSL,

DB2000QL compliant, clock buffer capable of

distributing the reference clock for PCIe Gen 1-5,

QuickPath Interconnect (QPI), UPI, SAS, and SATA

interfaces. The SMBus, SBI, and 8 output enable

pins allow the configuration and control of all 20

outputs individually. The CDCDB2000 is a DB2000QL

derivative buffer and meets or exceeds the system

parameters in the DB2000QL specification. The

CDCDB2000 is packaged in a 6-mm × 6-mm TLGA/

GQFN package with 80 leads.