CDC351DB集成电路（IC）的时钟缓冲器驱动器规格书PDF中文资料

CDC351DB属于集成电路（IC）的时钟缓冲器驱动器。由美国德州仪器公司制造生产的CDC351DB时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。

FEATURES

· Low Output Skew, Low Pulse Skew for

Clock-Distribution and Clock-Generation

Applications

· Operates at 3.3-V VCC

· LVTTL-Compatible Inputs and Outputs

· Supports Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V VCC)

· Distributes One Clock Input to Ten Outputs

· Distributed VCC and Ground Pins Reduce

Switching Noise

· High-Drive Outputs (–32-mA IOH, 32-mA IOL)

· State-of-the-Art EPIC-IIB™ BiCMOS Design

Significantly Reduces Power Dissipation

· Package Options Include Plastic

Small-Outline (DW) and Shrink Small-Outline

(DB) Packages

DESCRIPTION

The CDC351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum

skew for clock distribution. The output-enable (OE) input disables the outputs to a high-impedance state. The

CDC351 operates at nominal 3.3-V VCC.

The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the

part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer

use and should be connected to GND.