CDC337DW集成电路（IC）的时钟缓冲器驱动器规格书PDF中文资料

CDC337DW属于集成电路（IC）的时钟缓冲器驱动器。由美国德州仪器公司制造生产的CDC337DW时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。

Low Output Skew, Low Pulse Skew for

Clock-Distribution and Clock-Generation

Applications

TTL-Compatible Inputs and

CMOS-Compatible Outputs

Distributes One Clock Input to Eight

Outputs

– Four Same-Frequency Outputs

– Four Half-Frequency Outputs

Distributed VCC and Ground Pins Reduce

Switching Noise

High-Drive Outputs (–48-mA IOH,

48-mA IOL)

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

Package Options Include Plastic

Small-Outline (DW)

description

The CDC337 is a high-performance, low-skew clock driver. It is specifically designed for applications requiring

synchronized output signals at both the clock frequency and one-half the clock frequency. The four Y outputs

switch in phase and at the same frequency as the clock (CLK) input. The four Q outputs switch at one-half the

frequency of CLK.

When the output-enable (OE) input is low and the clear (CLR) input is high, the Y outputs follow CLK and the

Q outputs toggle on low-to-high transitions at CLK. Taking CLR low asynchronously resets the Q outputs to the

low level. When OE is high, the outputs are in the high-impedance state.

The CDC337 is characterized for operation from –40°C to 85°C.