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CDC2516数据手册集成电路(IC)的时钟发生器PLL频率合成器规格书PDF

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厂商型号

CDC2516

参数属性

CDC2516 封装/外壳为48-TFSOP(0.240",6.10mm 宽);包装为管件;类别为集成电路(IC)的时钟发生器PLL频率合成器;产品描述:IC 3.3V PLL CLK-DRVR 48-TSSOP

功能描述

具有三态输出的 3.3V 相位锁定环路时钟驱动器

封装外壳

48-TFSOP(0.240",6.10mm 宽)

制造商

TI Texas Instruments

中文名称

德州仪器 美国德州仪器公司

数据手册

下载地址下载地址二

更新时间

2025-8-6 23:00:00

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CDC2516规格书详情

描述 Description

The CDC2516 is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback output (FBOUT) to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The CDC2516 operates at 3.3-V VCC and provides integrated series-damping resistors that make it ideal for driving point-to-point loads.

Four banks of four outputs provide 16 low-skew, low-jitter copies of the input clock. Output signal duty cycles are adjusted to 50 percent, independent of the duty cycle at the input clock. Each bank of outputs can be enabled or disabled separately via the 1G, 2G, 3G, and 4G control inputs. When the G inputs are high, the outputs switch in phase and frequency with CLK; when the G inputs are low, the outputs are disabled to the logic-low state.

Unlike many products containing PLLs, the CDC2516 does not require external RC networks. The loop filter for the PLL is included on-chip, minimizing component count, board space, and cost.

Because it is based on PLL circuitry, the CDC2516 requires a stabilization time to achieve phase lock of the feedback signal to the reference signal. This stabilization time is required following power up and application of a fixed-frequency, fixed-phase signal at CLK, as well as following any changes to the PLL reference or feedback signals. The PLL may be bypassed for test purposes by strapping AVCC to ground.

The CDC2516 is characterized for operation from 0°C to 70°C.

特性 Features

• Use CDCVF2510A as a Replacement for this Device
• Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
• Distributes One Clock Input to Four Banks of Four Outputs
• Separate Output Enable for Each Output Bank
• External Feedback Pin (FBIN) Is Used to Synchronize the Outputs to the Clock Input
• On-Chip Series-Damping Resistors
• No External RC Network Required Operates at 3.3-V VCC
• Packaged in Plastic 48-Pin Thin Shrink Small-Outline Package

技术参数

  • 制造商编号

    :CDC2516

  • 生产厂家

    :TI

  • Additive RMS jitter (Typ) (fs)

    :200

  • Output frequency (Max) (MHz)

    :125

  • Number of outputs

    :16

  • Output supply voltage (V)

    :3.3

  • Core supply voltage (V)

    :3.3

  • Output skew (ps)

    :250

  • Features

    :1:4 fanout

  • Operating temperature range (C)

    :0 to 70

  • Rating

    :Catalog

  • Output type

    :TTL

  • Input type

    :TTL

供应商 型号 品牌 批号 封装 库存 备注 价格
TI(德州仪器)
24+
TSSOP486.1mm
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
询价
TI/德州仪器
24+
NA/
1048
优势代理渠道,原装正品,可全系列订货开增值税票
询价
TI
23+
NA
20000
全新原装假一赔十
询价
TI
20+
TSSOP
53650
TI原装主营-可开原型号增税票
询价
TEXAS
24+/25+
458
原装正品现货库存价优
询价
TI
1601+;06+;10+
TSSOP
1960
一级代理,专注军工、汽车、医疗、工业、新能源、电力
询价
TI
17+
SSOP
9988
只做原装进口,自己库存
询价
TI
2016+
TSSOP48
6528
只做进口原装现货!假一赔十!
询价
TI
22+
48-TSSOP
5000
全新原装,力挺实单
询价
TI
20+
TSSOP-48P
2960
诚信交易大量库存现货
询价