CDC111中文资料3.3V LVPECL 差动时钟驱动器数据手册TI规格书

描述 Description

The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs (CLKIN, CLKIN\\) to nine pairs of differential clock (Y, Y\\) outputs with minimum skew for clock distribution. It is specifically designed for driving 50- transmission lines. When the output-enable (OE\\) is low, the nine differential outputs switch at the same frequency as the differential clock inputs. When OE\\ is high, the nine differential outputs are in static states (Y outputs are in the low state, Y\\ outputs are in the high state). The VREF output can be strapped to the CLKIN\\ input for a single-ended CLKIN input. The CDC111 is characterized for operation from 0°C to 70°C.

特性 Features

• Low-Output Skew for Clock-Distribution Applications
• Differential Low-Voltage Pseudo-ECL (LVPECL)-Compatible Inputs and Outputs
• Distributes Differential Clock Inputs to Nine Differential Clock Outputs
• Output Reference Voltage, VREF, Allows Distribution From a Single-Ended Clock Input
• Single-Ended LVPECL-Compatible Output Enable
• Packaged in Plastic Chip Carrier

简介

CDC111属于集成电路（IC）的时钟缓冲器驱动器。由TI制造生产的CDC111时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。