CD74HCT670中文资料高速 CMOS 逻辑 4 x 4 寄存器文件数据手册TI规格书

描述 Description

The ’HC670 and CD74HCT670 are 16-bit register files organized as 4 words x 4 bits each. Read and write address and enable inputs allow simultaneous writing into one location while reading another. Four data inputs are provided to store the 4-bit word. The write address inputs (WA0 and WA1) determine the location of the stored word in the register. When write enable (WE\\) is low the word is entered into the address location and it remains transparent to the data. The outputs will reflect the true form of the input data. When (WE\\) is high data and address inputs are inhibited. Data acquisition from the four registers is made possible by the read address inputs (RA1 and RA0). The addressed word appears at the output when the read enable (RE\\) is low. The output is in the high impedance state when the (RE\\) is high. Outputs can be tied together to increase the word capacity to 512 x 4 bits.

特性 Features

• Simultaneous and Independent Read and Write Operations
• Three-State Outputs
• Buffered Inputs
• Fanout (Over Temperature Range)
• Bus Driver Outputs...15 LSTTL Loads
• Balanced Propagation Delay and Transition Times
• HC Types
• High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
• CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH