CD74HCT174MT集成电路（IC）的触发器规格书PDF中文资料

CD74HCT174MT属于集成电路（IC）的触发器。由美国德州仪器公司制造生产的CD74HCT174MT触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。

Features

• Buffered Positive Edge Triggered Clock

• Asynchronous Common Reset

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

Description

The ’HC174 and ’HCT174 are edge triggered flip-flops which

utilize silicon gate CMOS circuitry to implement D-type flipflops.

They possess low power and speeds comparable to low

power Schottky TTL circuits. The devices contain six masterslave

flip-flops with a common clock and common reset.

Data on the D input having the specified setup and hold

times is transferred to the Q output on the low to high

transition of the CLOCK input. The MR input, when low, sets

all outputs to a low state.

Each output can drive ten low power Schottky TTL

equivalent loads. The ’HCT174 is functional as well as, pin

compatible to the ’LS174.