CD74HC4520MT集成电路（IC）的计数器除法器规格书PDF中文资料

CD74HC4520MT属于集成电路（IC）的计数器除法器。由德州仪器制造生产的CD74HC4520MT计数器，除法器计数器和除法器 IC 是数字逻辑器件，可对输入发生的逻辑转换进行计数，然后使用多个并行输出重新发送累加的计数，和/或生成单个输出信号转换，从而对应用某些整数数量输入信号转换进行响应。除了简单的事件计数，它们还可用于各种频率合成应用。

特性 Features

• Positive or Negative Edge Triggering

• Synchronous Internal Carry Propagation

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

描述 Description

The CD74HC4518 is a dual BCD up-counter. The ’HC4520

and CD74HCT4520 are dual binary up-counters. Each

device consists of two independent internally synchronous

4-stage counters. The counter stages are D-type flip-flops

having interchangeable CLOCK and ENABLE lines for

incrementing on either the positive-going or the negativegoing

transition of CLOCK. The counters are cleared by high

levels on the MASTER RESET lines. The counter can be

cascaded in the ripple mode by connecting Q3 to the

ENABLE input of the subsequent counter while the CLOCK

input of the latter is held low.