CD74HC4060PWRG4集成电路（IC）的计数器除法器规格书PDF中文资料

CD74HC4060PWRG4属于集成电路（IC）的计数器除法器。由德州仪器制造生产的CD74HC4060PWRG4计数器，除法器计数器和除法器 IC 是数字逻辑器件，可对输入发生的逻辑转换进行计数，然后使用多个并行输出重新发送累加的计数，和/或生成单个输出信号转换，从而对应用某些整数数量输入信号转换进行响应。除了简单的事件计数，它们还可用于各种频率合成应用。

特性 Features

• Onboard Oscillator

• Common Reset

• Negative-Edge Clocking

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

描述 Description

The ’HC4060 and ’HCT4060 each consist of an oscillator

section and 14 ripple-carry binary counter stages. The

oscillator configuration allows design of either RC or crystal

oscillator circuits. A Master Reset input is provided which

resets the counter to the all-0’s state and disables the

oscillator. A high level on the MR line accomplishes the reset

function. All counter stages are master-slave flip-flops. The

state of the counter is advanced one step in binary order on

the negative transition of φI (and φO). All inputs and outputs

are buffered. Schmitt trigger action on the input-pulse-line

permits unlimited rise and fall times.

In order to achieve a symmetrical waveform in the oscillator

section the HCT4060 input pulse switch points are the same

as in the HC4060; only the MR input in the HCT4060 has

TTL switching levels.