CD74HC4017NSR集成电路（IC）的计数器除法器规格书PDF中文资料

CD74HC4017NSR属于集成电路（IC）的计数器除法器。由德州仪器制造生产的CD74HC4017NSR计数器，除法器计数器和除法器 IC 是数字逻辑器件，可对输入发生的逻辑转换进行计数，然后使用多个并行输出重新发送累加的计数，和/或生成单个输出信号转换，从而对应用某些整数数量输入信号转换进行响应。除了简单的事件计数，它们还可用于各种频率合成应用。

特性 Features

• Fully Static Operation

• Buffered Inputs

• Common Reset

• Positive Edge Clocking

• Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

描述 Description

The ’HC4017 is a high speed silicon gate CMOS 5-stage

Johnson counter with 10 decoded outputs. Each of the

decoded outputs is normally low and sequentially goes high

on the low to high transition clock period of the 10 clock

period cycle. The CARRY (TC) output transitions low to high

after OUTPUT 10 goes from high to low, and can be used in

conjunction with the CLOCK ENABLE (CE) to cascade

several stages. The CLOCK ENABLE input disables

counting when in the high state. A RESET (MR) input is also

provided which when taken high sets all the decoded

outputs, except “0”, low.

The device can drive up to 10 low power Schottky equivalent

loads.