CD74FCT244M96集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

CD74FCT244M96属于集成电路（IC）的缓冲器驱动器接收器收发器。由德州仪器制造生产的CD74FCT244M96缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

BiCMOS Technology With Low Quiescent

Power

Buffered Inputs

Noninverted Outputs

Input/Output Isolation From VCC

Controlled Output Edge Rates

64-mA Output Sink Current

Output Voltage Swing Limited to 3.7 V

SCR Latch-Up-Resistant BiCMOS Process

and Circuit Design

description/ordering information

The CD74FCT244 and CD74FCT244AT are octal

buffer/line drivers with 3-state outputs using a

small-geometry BiCMOS technology. The output stages are a combination of bipolar and CMOS transistors that

limit the output high level to two diode drops below VCC. This resultant lowering of output swing (0 V to 3.7 V)

reduces the power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCC bounce and

ground bounce and their effects during simultaneous output switching. The output configuration also enhances

switching speed and is capable of sinking 64 mA.

These devices are organized as two 4-bit buffers/line drivers with separate active-low output-enable (OE)

inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs

are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.