CD74AC112集成电路（IC）的触发器规格书PDF中文资料

CD74AC112属于集成电路（IC）的触发器。由德州仪器制造生产的CD74AC112触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。

AC Types Feature 1.5-V to 5.5-V Operation

and Balanced Noise Immunity at 30% of the

Supply Voltage

Speed of Bipolar F, AS, and S, With

Significantly Reduced Power Consumption

Balanced Propagation Delays

±24-mA Output Drive Current

– Fanout to 15 F Devices

SCR-Latchup-Resistant CMOS Process and

Circuit Design

Exceeds 2-kV ESD Protection Per

MIL-STD-883, Method 3015

description/ordering information

The ’AC112 devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset

(PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE

and CLR are inactive (high), data at the J and K inputs meeting the setup-time requirements is transferred to

the outputs on the negative-going edge of the clock pulse (CLK). Clock triggering occurs at a voltage level and

is not directly related to the fall time of the clock pulse. Following the hold-time interval, data at the J and K inputs

may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle

flip-flops by tying J and K high.