CD54HCT365中文资料军用 6 通道 4.5V 至 5.5V 缓冲器数据手册TI规格书

描述 Description

The ’HC365, ’HCT365, and ’HC366 silicon gate CMOS three-state buffers are general purpose high-speed non-inverting and inverting buffers. They have high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits possess the low power dissipation of CMOS circuitry, yet have speeds comparable to low power Schottky TTL circuits. Both circuits are capable of driving up to 15 low power Schottky inputs.

The ’HC365 and ’HCT365 are non-inverting buffers, whereas the ’HC366 is an inverting buffer. These devices have two three-state control inputs (OE1\\ and OE2\\) which are NORed together to control all six gates.

The ’HCT365 logic families are speed, function and pin compatible with the standard LS logic family.

特性 Features

• Buffered Inputs
• Typical Propagation Delay tPLH, tPHL = 8ns at VCC =5V, CL = 15pF, TA = 25°C
• Standard Outputs...10 LSTTL Loads
• Wide Operating Temperature Range... –55°C to 125°C
• Significant Power Reduction Compared to LSTTL Logic ICs
• 2V to 6V Operation
• HCT Types
• Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
• CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor