CD54HCT14F3A中文资料德州仪器数据手册PDF规格书

1 Features

• LSTTL input logic compatible

– VIL(max) = 0.8 V, VIH(min) = 2 V

• CMOS input logic compatible

– II ≤ 1 μA at VOL, VOH

• Buffered inputs

• 4.5 V to 5.5 V operation

• Wide operating temperature range:

-55°C to +125°C

• Supports fanout up to 10 LSTTL loads

• Significant power reduction compared to LSTTL

logic ICs

2 Applications

• Synchronize inverted clock inputs

• Debounce a switch

• Invert a digital signal

3 Description

This device contains six independent inverters

with Schmitt-trigger inputs. Each gate performs the

Boolean function Y = A in positive logic.