丝印：5962-8995301EA；Package：CDIP；High Speed CMOS Logic Dual 4-Stage Static Shift Register

Features • Maximum Frequency, Typically 60MHz CL = 15pF, VCC = 5V, TA = 25oC • Positive-Edge Clocking • Overriding Reset • Buffered Inputs and Outputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . .

文件：312.29 Kbytes 页数：12 Pages

TI

德州仪器

High Speed CMOS Logic Dual 4-Stage Static Shift Register

文件：260.149 Kbytes 页数：5 Pages

TI

德州仪器

High Speed CMOS Logic Dual 4-Stage Static Shift Register

文件：266.08 Kbytes 页数：10 Pages

TI

德州仪器

High Speed CMOS Logic Dual 4-Stage Static Shift Register

文件：377.67 Kbytes 页数：11 Pages

TI

德州仪器

丝印：5962-8995301EA；Package：CDIP；High Speed CMOS Logic Dual 4-Stage Static Shift Register

Features • Maximum Frequency, Typically 60MHz CL = 15pF, VCC = 5V, TA = 25oC • Positive-Edge Clocking • Overriding Reset • Buffered Inputs and Outputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . .

文件：312.29 Kbytes 页数：12 Pages

TI

德州仪器