CD54ACT20F3A.A中文资料德州仪器数据手册PDF规格书

Inputs Are TTL-Voltage Compatible

Speed of Bipolar F, AS, and S, With

Significantly Reduced Power Consumption

Balanced Propagation Delays

±24-mA Output Drive Current

– Fanout to 15 F Devices

SCR-Latchup-Resistant CMOS Process and

Circuit Design

Exceeds 2-kV ESD Protection Per

MIL-STD-883, Method 3015

description/ordering information

The ’ACT20 devices contain two independent 4-input NAND gates. They perform the Boolean function

Y = A • B • C • D or Y = A + B + C + D in positive logic.