CD54ACT138F3A中文资料德州仪器数据手册PDF规格书

1 Features

• Inputs are TTL-voltage compatible

• Speed of bipolar F, AS, and S, with significantly

reduced power consumption

• Designed specifically for high-speed memory

decoders and data-transmission systems

• Incorporate three enable inputs to simplify

cascading and/or data reception

• Balanced propagation delays

• ±24mA output drive current

– Fanout to 15 F devices

• SCR-latchup-resistant CMOS process and circuit

design

• Exceeds 2kV ESD protection per MIL-STD-883,

method 3015

2 Description

The ’ACT138 decoders/demultiplexers are designed

for high-performance memory-decoding and datarouting

applications that require very short

propagation-delay times. In high-performance

memory systems, these decoders can be used to

minimize the effects of system decoding.