CD54AC139F3A中文资料德州仪器数据手册PDF规格书

AC Types Feature 1.5-V to 5.5-V Operation

and Balanced Noise Immunity at 30% of the

Supply Voltage

Buffered Inputs

Incorporate Two Enable Inputs to Simplify

Cascading and/or Data Reception

Speed of Bipolar F, AS, and S, With

Significantly Reduced Power Consumption

Balanced Propagation Delays

±24-mA Output Drive Current

– Fanout to 15 F Devices

SCR-Latchup-Resistant CMOS Process and

Circuit Design

Exceeds 2-kV ESD Protection Per

MIL-STD-883, Method 3015

description/ordering information

The ’AC139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 1.5-V to 5.5-V VCC operation.

These devices are designed to be used in high-performance memory-decoding or data-routing applications

requiring very short propagation delay times. In high-performance memory systems, these decoders can be

used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable

circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical

access time of the memory. This means that the effective system delay introduced by the decoders is negligible.

The active-low enable (G) input can be used as a data line in demultiplexing applications. These

decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its

driving circuit.