CD4572UBNSR.A规格书应用电路原装现货TI-114ic电子网

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CD4572UBNSR.A	文件：896.17 Kbytes Page：20 Pages	丝印：CD4572UB；Package：SOP；CMOS Hex Gate Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 文件：896.17 Kbytes 页数：20 Pages	TI 德州仪器	TI
CD4572UBPWR	文件：1.12772 Mbytes Page：16 Pages	CMOS Hex Gate 文件：1.12772 Mbytes 页数：16 Pages	TI 德州仪器	TI
CD4572UBPWR	文件：896.17 Kbytes Page：20 Pages	CMOS Hex Gate Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 文件：896.17 Kbytes 页数：20 Pages	TI 德州仪器	TI
CD4572UBPWR.A	文件：896.17 Kbytes Page：20 Pages	CMOS Hex Gate Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1 文件：896.17 Kbytes 页数：20 Pages	TI 德州仪器	TI

更多CD4572UBNSR.A供应商更新时间2026-1-28 15:24:00