CD4517BMS中文资料INTERSIL数据手册PDF规格书
CD4517BMS规格书详情
描述 Description
CD4517BMS dual 64-stage static shift register consists of two independent registers each having a clock, data, and write enable input and outputs accessible at taps following the 16th, 32rd, 48th, and 64th stages. These
taps also serve as input points allowing data to be inputted at the 17th, 33rd, and 49th stages when the write enable input is a logic 1 and the clock goes through a low-to-high transition. The truth table indicates how the clock and write enable inputs control the opeation of the CD4517BMS.
特性 Features
• High-Voltage Types (20-Volt Rating)
• Low Quiescent Current - 10nA/pkg (Typ.) at VDD = 5V
• Clock Frequency 12MHz (Typ.) at VDD = 10V
• Schmitt Trigger Clock Inputs Allow Operation with Very Slow Clock Rise and Fall Times
• Capable of Driving Two Low-power TTL Loads, One Low-power Schottky TTL Load, or Two HTL Loads
• 3-State Outputs
• 100 Tested for Quiescent Current at 20V
• Standardized, Symmetrical Output Characteristics
• 5V, 10V, and 15V Parametric Ratings
• Meets all Requirements of JEDEC Tentative Standard No. 13B, Standard Specifications for Description of ‘B’ Series CMOS Devices
Applications
• Time-delay Circuits
• Scratch-pad Memories
• General-purpose Serial Shift-register Applications
产品属性
- 型号:
CD4517BMS
- 制造商:
INTERSIL
- 制造商全称:
Intersil Corporation
- 功能描述:
CMOS Dual 64-Stage Static Shift Register
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
NSC |
2016+ |
DIP |
9000 |
只做原装,假一罚十,公司可开17%增值税发票! |
询价 | ||
TI |
23+ |
SOP16 |
20000 |
全新原装假一赔十 |
询价 | ||
NATIONAL |
24+/25+ |
53 |
原装正品现货库存价优 |
询价 | |||
NSC |
25+ |
DIP |
2650 |
原装优势!绝对公司现货 |
询价 | ||
NS |
25+ |
DIP14 |
18000 |
原厂直接发货进口原装 |
询价 | ||
???? |
25+ |
DIPSOP |
5000 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
询价 | ||
TI |
2015+ |
DIP |
19889 |
一级代理原装现货,特价热卖! |
询价 | ||
24+ |
SOP |
64000 |
大批量供应优势库存热卖 |
询价 | |||
TI |
24+ |
DIPSOP |
6980 |
原装现货,可开13%税票 |
询价 | ||
TI |
25+ |
DIP |
3200 |
全新原装、诚信经营、公司现货销售! |
询价 |


