BCD-to-7 Segment Latch/Decoder/Driver

General Description\nThe CD4511BC BCD-to-seven segment latch/decoder/driver is constructed with complementary MOS (CMOS) enhancement mode devices and NPN bipolar output drivers in a single monolithic structure. The circuit provides the functions of a 4-bit storage latch, an 8421 BCD-to-seven segment ■ Low logic circuit power dissipation\n■ High current sourcing outputs (up to 25 mA)\n■ Latch storage of code\n■ Blanking input\n■ Lamp test provision\n■ Readout blanking on all illegal input combinations\n■ Lamp intensity modulation capability\n■ Time share (multiplexing) facility\n■ Equivalent to ;

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安森美半导体

BCD to 7-segment latch/decoder/driver

GENERAL DESCRIPTION The 74HC/HCT4511 are high-speed Si-gate CMOS devices and are pin compatible with “4511” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Latch storage of BCD inputs • Blanking input • Lamp test input • Driving common cathode L

文件：80.13 Kbytes 页数：12 Pages

PHI

PHI

BCD to 7-segment latch/decoder/driver

DESCRIPTION The HEF4511B is a BCD to 7-segment latch/decoder/driver with four address inputs (DA to DD), an active LOW latch enable input (EL), an active LOW ripple blanking input (BI), an active LOW lamp test input (LT), and seven active HIGH n-p-n bipolar transistor segment outputs (Oa to Og).

文件：108.47 Kbytes 页数：11 Pages

PHI

PHI

BCD to 7-segment latch/decoder/driver

DESCRIPTION The HEF4511B is a BCD to 7-segment latch/decoder/driver with four address inputs (DA to DD), an active LOW latch enable input (EL), an active LOW ripple blanking input (BI), an active LOW lamp test input (LT), and seven active HIGH n-p-n bipolar transistor segment outputs (Oa to Og).

文件：108.47 Kbytes 页数：11 Pages

PHI

PHI