CD4063B中文资料4 位幅度比较器数据手册TI规格书

描述 Description

CD4063B is a 4-bit magnitude comparator designed for use in computer and logic applications that require the comparison of two 4-bit words. This logic circuit determines whether one 4-bit word (Binary or BCD) is \"less than\", \"equal to\", or \"greater than\" a second 4-bit word.

The CD4063B has eight comparing inputs (A3, B3, through A0, B0), three outputs (A < B, A = B, A > B) and three cascading inputs (A < B, A = B, A > B) that permit systems designers to expand the comparator function to 8, 12, 16 . . . 4N bits. When a single CD4063B is used, the cascading inputs are connected as follows: (A < B) = low, (A = B) = high, (A > B) = low.

For words longer than 4 bits, CD4063B devices may be cascaded by connecting the outputs of the less-significant comparator to the corresponding cascading inputs of the more-significant comparator. Cascading inputs (A < B, A = B, and A > B) on the least significant comparator are connected to a low, a high, and a low level, respectively.

The CD4063B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). This device is pin-compatible with the standard 7485 TTL type.

特性 Features

• Expansion to 8, 12, 16...4N bits by cascading units
• 100% tested for quiescent current at 20 V
• 5-V, 10-V, and 15-V parametric ratings
• Noise margin (full package temperature range) =
• 2 V at VDD = 10 V
• Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of ’B’ Series CMOS Devices\"
• Servo motor controls
• Process controllers

Data sheet acquired from Harris Semiconductor.

简介

CD4063B属于集成电路（IC）的比较器。由TI制造生产的CD4063B比较器逻辑比较器系列产品用于根据以数字格式表示的信息比较结果来生成输出；身份型比较器指示两个输入是否相同，幅度型比较器还指示两个输入不相同时哪个较大。它们不同于比较两个模拟输入幅度的器件，后者称为线性比较器且单独分类。