CD4046BC集成电路（IC）的时钟发生器PLL频率合成器规格书PDF中文资料

General Description

The CD4046BC micropower phase-locked loop (PLL) con sists of a low power, linear, voltage-controlled oscillator (VCO), a source follower, a zener diode, and two phase comparators. The two phase comparators have a common signal input and a common comparator input. The signal input can be directly coupled for a large voltage signal, or capacitively coupled to the self-biasing amplifier at the signal input for a small voltage signal.

特性 Features

■ Wide supply voltage range: 3.0V to 18V

■ Low dynamic power consumption: 70 µW (typ.) at fo = 10 kHz, VDD = 5V

■ VCO frequency: 1.3 MHz (typ.) at VDD = 10V

■ Low frequency drift: 0.06/°C at VDD = 10V with temperature

■ High VCO linearity: 1 (typ.)

Applications

• FM demodulator and modulator

• Frequency synthesis and multiplication

• Frequency discrimination

• Data synchronization and conditioning

• Voltage-to-frequency conversion

• Tone decoding

• FSK modulation

• Motor speed control