CD4034B中文资料CMOS 8 级静态双向并行/串行输入/输出总线寄存器数据手册TI规格书

描述 Description

CD4034B is a static eight-stage parallel-or serial-input parallel-output register.It can be used to:
1) bidirectionally transfer parallel information between two buses, 2) convert serial data to parallel form and direct the parallel data to either of two buses, 3) store (recirculate) parallel data, or 4) accept parallel data from either of two buses and convert that data to serial form.Input that control the operations include a single-phase CLOCK (CL), A DATA ENABLE (AE), ASYNCHRONOUS/SYNCHRONOUS (A/S), A-BUS-TO-B-BUS/B-BUS-TO-A-BUS (A/B), and PARALLEL/SERIAL (P/S).
Data inputs include 16 bidirectional parallel data lines of which the eight A data lines are inputs (3-state outputs) and the B data lines are outputs (inputs) depending on the signal level on the A/B input.In addition, an input for SERIAL DATA is also provided.
All register stages are D-type master-slave flip-flops with separate master and slave clock inputs generated internally to allow synchronous or asynchronous data transfer from master to slave.Isolation from external noise and the effects of loading is provided by output buffering.
Register expansion can be accomplished by simply cascading CD4034B packages.
The CD4034B types are supplied in 24-lead hermetic dual-in-line ceramic packages (F3A suffix), 24-lead dual-in-line plastic packages (E suffix), 24-lead small-outline packages (M, M96, and NSR suffixes), and 24-lead thin shrink small-outline packages (PW and PWR suffixes).

特性 Features

• Bidirectional parallel data input
• Asynchronous or synchronous parallel data loading
• Data recirculation for register expansion
• Fully static operation dc-to-10 MHz (typ.) at VDD = 10 V
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100nA at 18 V and 25°C
• 2 V at VDD = 10 V
• Meets all requirements of JEDEC Tentative Standard No. 13A, \"Standard Specifications for Description of 'B' Series CMOS Devices\"
• Shift right/shift left register
• Address register
• Bus system register with enable parallel lines at bus side
• Up-Down Johnson or ring counter
• Sample and hold register (storage, counting, display)
• Frequency and phase comparator