CD4031BF3A中文资料德州仪器数据手册PDF规格书

Features;

® Fully static operation: DC to 12 MHz typ. @ Vpp—Vsg

=15v

= Standard TTL drive capability on Q output

= Recirculation capability

= Three cascading modes:

Direct clocking for high-speed operation

Delayed clocking for reduced clock drive requirements

Additional 1/2 stage for slow clocks

= 100% tested for quiescent current at 20 V.

= Maximum input current of 1 uA at 18 V

over full package-temperature range; 100 nA

at 18 V and 25°C

= Noise margin (over full package-temperature

range)

1VatVpp=56V

2VatVpp=10V

25VatVpp=16V

#5.V, 10-V, and 15-V parametric ratings

® Meets afl requirements of JEDEC Tenta-

tive Standard No. 198, “Standard Specifi-

cations for Description of ‘B’ Series CMOS

Devices”