CD4024BMS中文资料INTERSIL数据手册PDF规格书

描述 Description

CD4020BMS, CD4024BMS, and CD4040BMS are ripple carry binary counters. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times. All inputs and outputs are buffered.

特性 Features

• High Voltage Types (20V Rating)

• Medium Speed Operation

• Fully Static Operation

• Buffered Inputs and Outputs

• 100 Tested for Quiescent Current at 20V

• Standardized Symmetrical Output Characteristics

• Common Reset

• 5V, 10V and 15V Parametric Ratings

• Maximum Input Current of 1µa at 18V Over Full Pack age-Temperature Range;

- 100nA at 18V and 25oC

• Noise Margin (Over Full Package Temperature Range):

- 1V at VDD = 5V

- 2V at VDD = 10V

- 2.5V at VDD = 15V

• Meets All Requirements of JEDEC Tentative Standard

  No. 13B, “Standard Specifications For Description Of ‘B’ Series CMOS Devices”

Applications

• Control Counters

• Timers

• Frequency Dividers

• Time-Delay Circuits