CD40105BF.A中文资料德州仪器数据手册PDF规格书

Features:

# Independent asynchronous inputs and outputs

® 3state outputs ® Expandable in sither direction

= Status indicators on input and output ® Reset capability

® Standardized, symmetrical output characteristics

100% tested for quiescent current at 20 /

#5.V, 10-V, and 16-V parametric ratings

® Maximum input current of 1 uA at 18 V.

over full package-temperature range;

100 nA at 18 V and 26°C

# Noise margin (over full package temperature

range): 1VatVop =5 V

2Vat Vpp = 103 25 Vat Vpp = 16V

® Meets all requirements of JEDEC Tentative

Standard No. 138, “Standard Specifications

for Description of ‘8° Series CMOS Devices”