CD4006BF3A.A中文资料德州仪器数据手册PDF规格书

Features:

= Fully st operation

= Shifting rates up to 12 MHz @ 10 V (typ)

Pormanont register storage with clock fine high or low —

no information recirculation required

= 100% tested for quiescent current at 20 V

= Standardized, symmetrical output characteristics

#5V, 10-V, and 16-V parametric ratings

Maximum input current of 1A at 18

over full package tamperaturs range; 100

PAL 18 and 25°C

* Noise margin (ful package temperature

range) = 1VatVpp= 5V

2Vavpp-10V

25VatVpp- 16

= Meets all requirements of JEDEC Tentative

Standard No. 138, “Standard Specifications

for Description of “B’ Series CMOS Devices” i.