CCVGA7C9中文资料VGA OR DVI-I PORT COMPANION CIRCUIT数据手册UTC规格书

描述 Description

The UTC CCVGA7C9 is an ESD solution for the VGA or DVI-I port connector. This device integrates ESD protection for all signals, level shifting for the DDC signals and buffering for the SYNC signals. ESD protection for the VIDEO, DDC and SYNC lines is implemented with low-capacitance current steering diodes. Separate positive supply rails are provided for the VIDEO, DDC and SYNC channels to facilitate interfacing with low voltage video controller ICs to provide design flexibility in multi-supply-voltage environments. Two non-inverting drivers provide buffering for the HSYNC and VSYNC signals from the video controller IC (SYNC1, SYNC2). These buffers accept TTL input levels and convert them to CMOS output levels that swing between Ground and VCC_SYNC, which is typically 5V. Additionally, each driver has a series termination resistor (RT) connected to the SYNC_OUT pin, eliminating the external termination resistors typically required for the HSYNC and VSYNC lines of the video cable. There are three versions with different values of RT to allow termination at typically 65Ω (UTC CCVGA7C9−00) or 15Ω (UTC CCVGA7C9−02). Two N-channel MOSFETs provide the level shifting function required when the DDC controller is operated at alower supply voltage than the monitor. The gate terminals for the MOSFETs (VCC_DDC) should be connected to the supply rail (typically 3.3 V) that supplies power to the transceivers of the DDC controller. All ESD diodes are designed to safely handle the high current spikes specified by IEC-61000-4-2 Level 4 (±8kV contact discharge if CBYP is present, ±4kV if not). The ESD protection for the DDC signal pins are designed to prevent “back current” when the device is powered down while connected to a monitor that is powered up.

特性 Features

· 7 Channels of ESD protection for all VGA port connector pins meeting IEC-61000-4-2 Level 4 ESD
· requirements (±8kV contact discharge)
· Includes ESD protection, level-shifting, buffering and sync impedance matching
· Very low loading capacitance from ESD protection diodes on VIDEO lines (4pF maximum)
· 5V drivers for HSYNC and VSYNC lines
· Integrated impedance matching resistors on sync lines
· Bi-directional level shifting N-Channel FETs provided for DDC_CLK & DDC_DATA channels
· Backdrive protection on DDC lines