C8051F018-GQ中文资料芯科科技数据手册PDF规格书

Analog Peripherals

10-Bit ADC

- ±1 LSB INL; no missing codes

- Programmable throughput up to 100 ksps

- 8 external inputs; programmable as single-ended or differential

- Data-dependent windowed interrupt generator

- Built-in temperature sensor (±3 °C)

Two Comparators

- 16 programmable hysteresis values

- Configurable to generate interrupts or reset

Internal Voltage Reference

VDD Monitor/Brown-out Detector

On-Chip JTAG Debug & Boundary Scan

- On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required)

- Provides breakpoints, single stepping, watchpoints, stack monitor

- Inspect/modify memory and registers

- Superior performance to emulation systems using ICE-chips, target pods, and sockets

- IEEE1149.1 compliant boundary scan

Supply Voltage: 2.8 to 3.6 V

- Typical operating current: 12.5 mA at 25 MHz

- Multiple power saving sleep and shutdown modes

Temperature Range: –40 to +85 °C

High-Speed 8051 µC Core

- Pipelined instruction architecture; executes 70 of instructions in 1 or 2 system clocks

- Up to 25 MIPS throughput with 25 MHz system clock

- Expanded interrupt handler

Memory

- 1280 bytes data RAM

- 16 kB Flash; in system programmamble in 512-byte sectors (512 bytes are reserved)

Digital Peripherals

- 32 port I/O; all are 5 V tolerant

- Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports available concurrently

- Programmable 16-bit counter/timer array with five capture/compare modules

- 4 general-purpose 16-bit counter/timers

- Dedicated watchdog timer; bidirectional reset

Clock Sources

- Internal programmable oscillator: 2–16 MHz

- External oscillator: Crystal, RC, C, or Clock

- Can switch between clock sources on-the-fly

Package

- 64-pin TQFP (standard lead and lead-free packages)

Ordering Part Numbers

- Lead-free package: C8051F018-GQ

- Standard package: C8051F018