PowerMOS transistor Logic level TOPFET

DESCRIPTION\nMonolithic temperature and overload protected logic level power MOSFET in a 3 pin plastic surface mount envelope, intended as a general purpose switch for automotive systems and other applications.FEATURES\n● Vertical power DMOS output stage\n● Low on-state resistance\n● Overload protec ● Vertical power DMOS output stage\n● Low on-state resistance\n● Overload protection against over temperature\n● Overload protection against short circuit load\n● Latched overload protection reset by input\n● 5 V logic compatible input level\n● Control of power MOSFET and supply of overload protecti;

恩XP

PowerMOS transistor Logic level TOPFET

DESCRIPTION Monolithic temperature and overload protected logic level power MOSFET in a 3 pin plastic surface mount envelope, intended as a general purpose switch for automotive systems and other applications. FEATURES ● Vertical power DMOS output stage ● Low on-state resistance ● Overload pr

文件：109.04 Kbytes 页数：11 Pages

PHI

PHI

PowerMOS transistor TOPFET

DESCRIPTION Monolithic temperature and overload protected power MOSFET in a 3 pin plastic surface mount envelope, intended as a general purpose switch for automotive systems and other applications. FEATURES ● Vertical power DMOS output stage ● Low on-state resistance ● Overload protection aga

文件：119.42 Kbytes 页数：12 Pages

PHI

PHI

PowerMOS transistor Logic level TOPFET

文件：64.15 Kbytes 页数：3 Pages

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