BS62LV256中文资料VeryLow Power CMOS SRAM 32K X 8 bit数据手册Brilliance规格书

描述 Description

DESCRIPTION
TheBS62L V256 is a high performance,very low power CMOS Static Random  Access  Memory  organized  as  32,768  by  8  bits  and operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced  CMOS  technology  and  circuit  techniques  provide  both high  speed  and  low  power  features  with  typical  CMOS  standby current  of  0.01uA  and  maximum  access  time  of  70ns  in  3.0V operation.FEATURES
Wide VCC operation voltage : 2.4V ~ 5.5V
Very low powerconsumption:
    VCC = 3.0V  Operationcurrent :  25mA (Max.)  at 70ns
                                               1mA (Max.)  at 1MHz
                     Standby current :  0.01uA(Typ.) at 25OC
   VCC = 5.0V  Operationcurrent :  40mA (Max.)  at 55ns
                                              2mA (Max.)  at 1MHz
                     Standby current :  0.4uA (Typ.)  at 25OC
Highspeed access time:
  -55  55ns(Max.) at VCC: 4.5~5.5V
  -70  70ns(Max.) at VCC: 3.0~5.5V
Automatic power down whenchip is deselected
Easy expansion with CE and OE options
Threestate outputs and TTLcompatible
Fully static operation
Data retentionsupply voltage as low as 1.5V

特性 Features

Wide VCC operation voltage : 2.4V ~ 5.5V
Very low powerconsumption:
    VCC = 3.0V  Operationcurrent :  25mA (Max.)  at 70ns
                                               1mA (Max.)  at 1MHz
                     Standby current :  0.01uA(Typ.) at 25OC
   VCC = 5.0V  Operationcurrent :  40mA (Max.)  at 55ns
                                              2mA (Max.)  at 1MHz
                     Standby current :  0.4uA (Typ.)  at 25OC
Highspeed access time:
  -55  55ns(Max.) at VCC: 4.5~5.5V
  -70  70ns(Max.) at VCC: 3.0~5.5V
Automatic power down whenchip is deselected
Easy expansion with CE and OE options
Threestate outputs and TTLcompatible
Fully static operation
Data retentionsupply voltage as low as 1.5V