BR25H160FJ-2C数据手册集成电路（IC）的存储器规格书PDF

描述 Description

BR25H160-2C是SPI BUS接口方式的串行EEPROM。

特性 Features

•High speed clock action up to 10MHz (Max.)
•Wait function by HOLDB terminal.
•Part or whole of memory arrays settable as read only
memory area by program.
•2.5V to 5.5V single power source action most
suitable
for battery use.
•Page write mode useful for initial value write at
factory shipment.
•For SPI bus interface (CPOL, CPHA)=(0, 0), (1, 1)
•Self-timed programming cycle.
•Low Supply Current
At write operation (5V) : 1.0mA (Typ.)
At read operation (5V) : 1.0mA (Typ.)
At standby operation (5V) : 0.1μA (Typ.)
•Address auto increment function at read operation
•Prevention of write mistake
Write prohibition at power on.
Write prohibition by command code (WRDI).
Write prohibition by WPB pin.
Write prohibition block setting by status registers
(BP1, BP0).
Prevention of write mistake at low voltage.
•MSOP8, TSSOP-B8, SOP8, SOP-J8 Package
•Data at shipment Memory array: FFh, status register
WPEN, BP1, BP0 : 0
•More than 100 years data retention.
•More than 1 million write cycles.
•AEC-Q100 Qualified.