BCM84147数据手册Broadcom中文资料规格书

描述 Description

45G serial to SFI-5.1 demultiplexer (DeMux) for use in 300-pin 40G modules.
 The BCM84147 has an OIF SFI-5.1 compliant 16-bit wide transmit system data interface with a deskew channel operating from 2.488 Gb/s to 2.788 Gb/s. The BCM84147 has two clock and data recovery (CDR) circuits that recover the clock and data from the received signals and then demultiplexes and transmits the data on the SFI-5.1 interface. There is an additional deskew lane for the SFI-5.1 interface. The CDR and demultiplexer are fully integrated. The data is recovered by the integrated CDR. The recovered data is interleaved to the SFI-5.1 interface along with a deskew channel copying data sequentially from each data channel. The SFI-5.1 timing clock is generated from the recovered clock. The extracted data can optionally be fed to a PRBS detector.

特性 Features

·Data rate support from 39.8 Gb/s to 44.6 Gb/s
·Equalizer for PMD and ISI compensation
·Status indicator for CDR lockdetect
·RX decision threshold adjust
·Core power supply: 1.0V
·SFI-5.1 CML I/O: 1.0V