BCM81181中文资料16nm 400GbE PAM-4 PHY数据手册Broadcom规格书

描述 Description

The Broadcom BCM81181 is a single-chip, low-power, low-latency PAM-4 PHY that integrates retimer and equalizer functions to support 400GbE applications. In 400GbE mode, the BCM81181 retimes, adds FEC (optional), and equalizes 8 × 50G PAM-4 host-side signals into 8 × 50G PAM-4 line-side signals, which drive optical PAM-4 links inside next-generation modules, including QSFPDD and OSFP. The BCM81181 is compliant to IEEE standards with KP4 FEC and FEC bypass capability. On-chip clock synthesis is performed by a low-cost 156.25 MHz reference clock via high-frequency, low-jitter phase-locked loops (PLLs). The BCM81181 is fabricated in advanced low-power 16 nm CMOS technology and is available in a RoHS-compliant package.

特性 Features

• 400GbE (8 × 50G PAM-4) PHY
• Host side: 8 × 50G PAM-4
• Line side: 8 × 50G PAM-4
• IEEE 802.3bs and 802.3cd compliance
• IEEE 400GAUI-8 PAM4 C2M compliant  
• Integrated host side AC-coupling caps 
• Line-side and client-side loopbacks
• Supports reaches for MMF/SMF fiber links 
• Low-power 16 nm CMOS design

简介

BCM81181属于集成电路（IC）的驱动器接收器收发器。由制造生产的BCM81181驱动器，接收器，收发器该系列产品的主要功能是提供必需的硬件资源，以通过延长电缆或印制线进行通信。确切的功能会因所采用的通信协议而异，可能包括诸如瞬态抑制之类的功能，这些功能对于通信用途可能并非绝对必要，但对于可能的使用环境却是明智之选。