BCM68650中文资料Multiport 10G PON MAC数据手册Broadcom规格书

描述 Description

The BCM68650 is a high-performance, single-chip, cost-effective OLT PON MAC SoC. It provides 16 NG-PON2/XGS-PON/XG-PON/GPON/10G AE/10G EPON/EPON OLT PON interfaces.
rBCM68650 integrates PON MACs and burst mode PON SERDES, as well as high-performance LPDDR4 interfaces for ITU-PON reassembly. The NNI Ethernet interface supports 10 Gbps KR/XFI, 12.12 Gbps XFI, and 25 Gbps KR which allows for flexibility when connecting to legacy and newer high performance aggregation switches
rAdditional supported interfaces include two single-lane PCIe 3.0 port (1x endpoint/root complex, 1x root complex), NAND/eMMC, BSC, serial port interface (SPI), UARTs, along with a host of general-purpose inputs/outputs (GPIOs), interrupts, and timers.\\r

特性 Features

• Supports the following integrated MACs, with various co- existence configurations

• 16 x GPON ITU-T G.984 MAC
• 16 x EPON IEEE 802.3ah MAC/1G Active Ethernet
• 16 x XG-PON ITU-T G.987 MAC
• 16 x XGS-PON ITU-T G.9807.1 MAC
• 16 x 10G EPON/10G Active Ethernet IEEE 802.3av MAC
• 16 x NG-PON2 (10/2.5) ITU-T G.989 MAC
• 16 x NG-PON2 (10/10) ITU-T G.989 MAC


• Multi-PON coexistence modes including but not limited to:

• GPON + XGS-PON through WDM1r
• 10G EPON + EPON though WDMA/TDMA


• Integrated burst mode PON SERDES circuitry enabling glueless interfaces to PON optical transceivers
• Integrated 16 x NNI SERDES circuitry supporting 10 Gb/s XFI/KR,12.12 Gb/s, and 25 Gb/s interfaces
•  ITU-T PON flexible upstream bandwidth scheduler:

• Static bandwidth allocation (CBA)
• Dynamic bandwidth allocation (DBA)


• IEEE PON hardware-based DBA:

• SLA enforcement
• CIR/EIR QoS
• TDM granting
• Dynamic polling engine
• Hierarchical scheduling


• Interworking function and queuing:

• VID to X/GEM Port ID/LLID mapping function
• MAC+VID to X/GEM Port ID/LLID mapping function


• Supported MTU:

• 10 KB for GPON/XG-PON/XGS-PON/NG-PON2/ 10G EPON
• 2000B for 1G/2G EPON


• Flow control - downstream (when downstream is congested):

• Flow control is forwarded from the PON MACs to the NNI and used for rate adaptation.
• XOF/XOFF or POFC (PON channels mapped to priority flow control) to the NNI.


• Flow control - upstream (when switch is congested):

• Supports receive of PFC packets from the NNI interface towards the GPON/XG-PON/XGS-PON/NG-PON2 reassembly queues, or the EPON/10G EPON/25G EPON DBA scheduler queues.


• External packet buffer for reassembly:

• Supports 4x 32-bit LPDDR4, up to 2133MHz (4266 MT/s)

简介

BCM68650属于集成电路（IC）的片上系统（SoC）。由制造生产的BCM68650片上系统（SoC）片上系统产品族中的器件在一个器件基底上组合了多个传统上以单独器件实现的计算系统组件，如通用微处理器、FPGA 协处理器和用于生成显示数据的图形控制器。虽然也可以整合有限数量的数据存储资源，但通常会提供连接外部存储设备的接口。