BCM5320M中文资料SINGLE-CHIP L2+ MANAGED SWITCH WITH 24 10/100 PORTS + 2 GbE PORTS数据手册Broadcom规格书

描述 Description

SINGLE-CHIP L2+ MANAGED SWITCH WITH 24 10/100 PORTS + 2 GbE PORTSFEATURES
• Seventh-generation ROBO L2+ 24FE + 2GE switch with two GMII/RGMII/TBI interfaces
• Twenty-four fully integrated 10/100 PHYs with support of Advanced Cable Diagnostics in the Broadcom PHY technology
• QoS packet classification supports four priority queues
• Port-based VLAN and 802.1Q VLAN with 4k entries
• Supports traffic aggregation via double tagging
• Spanning Tree (IEEE 802.1D/1s/1w)
• MAC-based trunking with automatic link failover
• Port mirroring
• IGMP snooping Layer2/3
• Over 70 MIB counters for per port management statistics
• Up to 24 Static Secure MAC addresses per port
• Programmable Broadcast, Multicast, and Unknown Unicast storm control
• Per port bandwidth/rate control
• 8K MAC addresses with automatic learning and aging
• Protected port
• Multicast address table for 256 entries
• 25th FE port via MII or reversed MII mode for management
• MDC/MDIO and SPI interfaces
• Internal oscillator simplifies design and reduces cost
• JTAG
• Embedded 2.5V and 1.2V regulator, typical power consumption: 3.5W
• 400-pin PBGA package

特性 Features

• Seventh-generation ROBO L2+ 24FE + 2GE switch with two GMII/RGMII/TBI interfaces
• Twenty-four fully integrated 10/100 PHYs with support of Advanced Cable Diagnostics in the Broadcom PHY technology
• QoS packet classification supports four priority queues
• Port-based VLAN and 802.1Q VLAN with 4k entries
• Supports traffic aggregation via double tagging
• Spanning Tree (IEEE 802.1D/1s/1w)
• MAC-based trunking with automatic link failover
• Port mirroring
• IGMP snooping Layer2/3
• Over 70 MIB counters for per port management statistics
• Up to 24 Static Secure MAC addresses per port
• Programmable Broadcast, Multicast, and Unknown Unicast storm control
• Per port bandwidth/rate control
• 8K MAC addresses with automatic learning and aging
• Protected port
• Multicast address table for 256 entries
• 25th FE port via MII or reversed MII mode for management
• MDC/MDIO and SPI interfaces
• Internal oscillator simplifies design and reduces cost
• JTAG
• Embedded 2.5V and 1.2V regulator, typical power consumption: 3.5W
• 400-pin PBGA package