BCM53134MIFBG集成电路（IC）的控制器规格书PDF中文资料

BCM53134MIFBG属于集成电路（IC）的控制器。由博通半导体制造生产的BCM53134MIFBG控制器该系列产品主要用于在采用不同通信协议和/或信令方法的端点之间提供信息连接。示例包括将 I2C 总线连接到 UART，将 USB 连接到 I2C、SPI、以太网或 UART、以太网 MAC 和 PHY 等的器件。此外，还包括用于通过为点对点通信设计的接口建立多路连接的器件，例如 USB 集线器控制器。

General Description

The Broadcom® BCM53134M is an ultra low-power, highly integrated, cost-effective smart-managed Gigabit switch. The switch design is based on the field-proven, industryleading ROBO architecture. This device combines all the functions of a high-speed switch system including packet buffers, PHY transceivers, media access controllers MACs), address management, port-based rate control, and nonblocking switch fabric into a single 28 nm CMOS device. Designed to be fully compliant with the IEEE 802.3 and IEEE 802.3x specifications, including the MAC-control PAUSE frame, the BCM53134M provides compatibility with all industry-standard Ethernet, Fast Ethernet, and Gigabit Ethernet (GbE) devices.

The BCM53134M has a rich feature set suitable for not only standard GbE connectivity for broadband home gateways, desktop, and laptop PCs, but also for next-generation gaming consoles, set-top boxes, networked DVD players, and home theater receivers. It is also specifically designed for next generation SOHO/SMB routers and gateways.

The BCM53134M contains four full-duplex 10/100/1000BASE-T Ethernet transceivers. In addition, the BCM53134M has two PHY-less interfaces for the CPU or a router chip, providing flexible 10/100/1000 Mb/s connectivity. One RGMII interface can be connected to a CPU entity and configured as an IMP (In-Band Management port).

The second RGMII interface is available for another PHY, modem, or CPU connection.

The BCM53134M provides 70+ on-chip MIB counters to collect receive and transmit statistics for each port.

特性 Features

 Six 10/100/1000 media access controllers

 Four-port 10/100/1000 transceivers for TX

 One RGMII interface for an IMP for connection to a CPU/management entity without PHY

 One RGMII interface for a connection to another PHY, CPU, or modem

 IEEE 802.1p, MAC Port, TOS, and DiffServ QoS for six queues, plus two time-sensitive queues

 Port-based VLAN

 IEEE 802.1Q-based VLAN with 4K entries

 MAC-based trunking with automatic link failover

 Port-based rate control

 Port mirroring (Ingress/Egress)

 Supports IPv4 and IPv6

 Priority modification on egress

 BroadSync® HD for IEEE 802.1AS support

 Timestamp tagging at MAC interface

 Time-aware egress scheduler

 DOS attack prevention

 IGMP Snooping, MLD snooping support

 Spanning tree support (multiple spanning trees–up to eight)

 Embedded CPU (8051) processor for cable diagnostics

 CableChecker™ with unmanaged mode support

 Double tagging/QinQ

 IEEE 802.az Energy Efficient Ethernet (EEE) support

 IEEE 802.3x programmable per-port flow control and backpressure, with IEEE 802.1X support for secure user authentication

 EEPROM, MDC/MDIO, and SPI Interface.

 Serial Flash Interface for accessing embedded CPU (8051)

 4K entry MAC address table with automatic learning and aging

 128 KB packet buffer (1 KB = 1024 bytes)

 128 multicast group support